AVR Internal Hardware Port B
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− | < | + | = <span class="f_Header">Port B</span> = |
+ | |||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | Port B is an 8-bit bi-directional I/O port. Three data memory address locations are allocated for the Port B, one each for the Data Register - PORTB, $18($38), Data Direction Register - DDRB, $17($37) and the Port B Input Pins - PINB, $16($36). The Port B Input Pins address is read only, while the Data Register and the Data Direction Register are read/write. | ||
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+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | All port pins have individually selectable pull-up resistors. The Port B output buffers can sink 20mA and thus drive LED displays directly. When pins PB0 to PB7 are used as inputs and are externally pulled low, they will source current if the internal pull-up resistors are activated. | ||
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+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | The Port B pins with alternate functions are shown in the following table: | ||
+ | |||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | When the pins are used for the alternate function the DDRB and PORTB register has to be set according to the alternate function description. | ||
+ | |||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | Port B Pins Alternate Functions | ||
+ | <div style="padding: 0px; margin: 0px 0px 0px 4px;"> | ||
+ | {| width="421" cellspacing="0" cellpadding="1" border="1" style="border: 2px solid rgb(0, 0, 0); border-spacing: 0px; border-collapse: collapse;" | ||
+ | |- style="vertical-align: top;" | ||
+ | | valign="top" width="22%" bgcolor="#ffffb2" style="width: 91px; background-color: rgb(255, 255, 178); border: 1px solid rgb(0, 0, 0);" | | ||
+ | <span style="font-weight: bold;">Port</span> | ||
+ | |||
+ | | valign="top" width="22%" bgcolor="#ffffb2" style="width: 92px; background-color: rgb(255, 255, 178); border: 1px solid rgb(0, 0, 0);" | | ||
+ | <span style="font-weight: bold;">Pin</span> | ||
+ | |||
+ | | valign="top" width="53%" bgcolor="#ffffb2" style="width: 226px; background-color: rgb(255, 255, 178); border: 1px solid rgb(0, 0, 0);" | | ||
+ | <span style="font-weight: bold;">Alternate Functions</span> | ||
+ | |||
+ | |- style="vertical-align: top;" | ||
+ | | valign="top" width="22%" style="width: 91px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | PORTB.0 | ||
+ | |||
+ | | valign="top" width="22%" style="width: 92px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | T0 | ||
+ | |||
+ | | valign="top" width="53%" style="width: 226px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | (Timer/Counter 0 external counter input) | ||
+ | |||
+ | |- style="vertical-align: top;" | ||
+ | | valign="top" width="22%" style="width: 91px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | PORTB.1 | ||
+ | |||
+ | | valign="top" width="22%" style="width: 92px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | T1 | ||
+ | |||
+ | | valign="top" width="53%" style="width: 226px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | (Timer/Counter 1 external counter input) | ||
+ | |||
+ | |- style="vertical-align: top;" | ||
+ | | valign="top" width="22%" style="width: 91px; height: 32px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | PORTB.2 | ||
+ | |||
+ | | valign="top" width="22%" style="width: 92px; height: 32px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | AIN0 | ||
+ | |||
+ | | valign="top" width="53%" style="width: 226px; height: 32px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | (Analog comparator positive input) | ||
+ | |||
+ | |- style="vertical-align: top;" | ||
+ | | valign="top" width="22%" style="width: 91px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | PORTB.3 | ||
+ | |||
+ | | valign="top" width="22%" style="width: 92px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | AIN1 | ||
+ | |||
+ | | valign="top" width="53%" style="width: 226px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | (Analog comparator negative input) | ||
+ | |||
+ | |- style="vertical-align: top;" | ||
+ | | valign="top" width="22%" style="width: 91px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | PORTB.4 | ||
+ | |||
+ | | valign="top" width="22%" style="width: 92px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | SS | ||
+ | |||
+ | | valign="top" width="53%" style="width: 226px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | (SPI Slave Select input) | ||
+ | |||
+ | |- style="vertical-align: top;" | ||
+ | | valign="top" width="22%" style="width: 91px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | PORTB.5 | ||
+ | |||
+ | | valign="top" width="22%" style="width: 92px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | MOSI | ||
+ | |||
+ | | valign="top" width="53%" style="width: 226px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | (SPI Bus Master Output/Slave Input) | ||
+ | |||
+ | |- style="vertical-align: top;" | ||
+ | | valign="top" width="22%" style="width: 91px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | PORTB.6 | ||
+ | |||
+ | | valign="top" width="22%" style="width: 92px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | MISO | ||
+ | |||
+ | | valign="top" width="53%" style="width: 226px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | (SPI Bus Master Input/Slave Output) | ||
+ | |||
+ | |- style="vertical-align: top;" | ||
+ | | valign="top" width="22%" style="width: 91px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | PORTB.7 | ||
+ | |||
+ | | valign="top" width="22%" style="width: 92px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | SCK | ||
+ | |||
+ | | valign="top" width="53%" style="width: 226px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | (SPI Bus Serial Clock) | ||
+ | |||
+ | |} | ||
+ | </div> | ||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | The Port B Input Pins address - PINB - is not a register, and this address enables access to the physical value on each Port B pin. When reading PORTB, the PORTB Data Latch is read, and when reading PINB, the logical values present on the pins are read. | ||
+ | |||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | = <span class="f_Header">PortB As General Digital I/O</span> = | ||
+ | |||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | All 8 bits in port B are equal when used as digital I/O pins. PORTB.X, General I/O pin: The DDBn bit in the DDRB register selects the direction of this pin, if DDBn is set (one), PBn is configured as an output pin. If DDBn is cleared (zero), PBn is configured as an input pin. If PORTBn is set (one) when the pin configured as an input pin, the MOS pull up resistor is activated. | ||
+ | |||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | To switch the pull up resistor off, the PORTBn has to be cleared (zero) or the pin has to be configured as an output pin. | ||
+ | |||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | DDBn Effects on Port B Pins | ||
+ | <div style="padding: 0px; margin: 0px 0px 0px 4px;"> | ||
+ | {| width="535" cellspacing="0" cellpadding="1" border="1" style="border: 2px solid rgb(0, 0, 0); border-spacing: 0px; border-collapse: collapse;" | ||
+ | |- style="vertical-align: top;" | ||
+ | | valign="top" width="100%" bgcolor="#ffffb2" style="width: 318px; background-color: rgb(255, 255, 178); border: 1px solid rgb(0, 0, 0);" | | ||
+ | <span style="font-weight: bold;">DDBn</span> | ||
+ | |||
+ | | valign="top" width="100%" bgcolor="#ffffb2" style="width: 56px; background-color: rgb(255, 255, 178); border: 1px solid rgb(0, 0, 0);" | | ||
+ | <span style="font-weight: bold;">PORTBn</span> | ||
+ | |||
+ | | valign="top" width="100%" bgcolor="#ffffb2" style="width: 46px; background-color: rgb(255, 255, 178); border: 1px solid rgb(0, 0, 0);" | | ||
+ | <span style="font-weight: bold;">I/O</span> | ||
+ | |||
+ | | valign="top" width="100%" bgcolor="#ffffb2" style="width: 26px; background-color: rgb(255, 255, 178); border: 1px solid rgb(0, 0, 0);" | | ||
+ | <span style="font-weight: bold;">Pull up</span> | ||
+ | |||
+ | | valign="top" width="100%" bgcolor="#ffffb2" style="width: 71px; background-color: rgb(255, 255, 178); border: 1px solid rgb(0, 0, 0);" | | ||
+ | <span style="font-weight: bold;">Comment</span> | ||
+ | |||
+ | |- style="vertical-align: top;" | ||
+ | | valign="top" width="100%" style="width: 318px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | 0 | ||
+ | |||
+ | | valign="top" width="100%" style="width: 56px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | 0 | ||
+ | |||
+ | | valign="top" width="100%" style="width: 46px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | Input | ||
+ | |||
+ | | valign="top" width="100%" style="width: 26px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | No | ||
+ | |||
+ | | valign="top" width="100%" style="width: 71px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | Tri-state (Hi-Z) | ||
+ | |||
+ | |- style="vertical-align: top;" | ||
+ | | valign="top" width="100%" style="width: 318px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | 0 | ||
+ | |||
+ | | valign="top" width="100%" style="width: 56px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | 1 | ||
+ | |||
+ | | valign="top" width="100%" style="width: 46px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | Input | ||
+ | |||
+ | | valign="top" width="100%" style="width: 26px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | Yes | ||
+ | |||
+ | | valign="top" width="100%" style="width: 71px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | PBn will source current if ext. pulled low. | ||
+ | |||
+ | |- style="vertical-align: top;" | ||
+ | | valign="top" width="100%" style="width: 318px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | 1 | ||
+ | |||
+ | | valign="top" width="100%" style="width: 56px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | 0 | ||
+ | |||
+ | | valign="top" width="100%" style="width: 46px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | Output | ||
+ | |||
+ | | valign="top" width="100%" style="width: 26px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | No | ||
+ | |||
+ | | valign="top" width="100%" style="width: 71px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | Push-Pull Zero Output | ||
+ | |||
+ | |- style="vertical-align: top;" | ||
+ | | valign="top" width="100%" style="width: 318px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | 1 | ||
+ | |||
+ | | valign="top" width="100%" style="width: 56px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | 1 | ||
+ | |||
+ | | valign="top" width="100%" style="width: 46px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | Output | ||
+ | |||
+ | | valign="top" width="100%" style="width: 26px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | No | ||
+ | |||
+ | | valign="top" width="100%" style="width: 71px; border: 1px solid rgb(0, 0, 0);" | | ||
+ | Push-Pull One Output | ||
+ | |||
+ | |} | ||
+ | </div> | ||
+ | <span style="font-family: Arial;"> </span> | ||
+ | |||
+ | By default, the DDR and PORT registers are 0. CONFIG PORTx=OUTPUT will set the entire DDR register. CONFIG PINX.Y will also set the DDR register for a single bit/pin. When you need the pull up to be activated, you have to write to the PORT register. | ||
+ | |||
+ | |||
+ | {{Languages}} | ||
[[Category:BASCOM HARDWARE]] | [[Category:BASCOM HARDWARE]] |
Latest revision as of 14:18, 13 February 2013
Port B
Port B is an 8-bit bi-directional I/O port. Three data memory address locations are allocated for the Port B, one each for the Data Register - PORTB, $18($38), Data Direction Register - DDRB, $17($37) and the Port B Input Pins - PINB, $16($36). The Port B Input Pins address is read only, while the Data Register and the Data Direction Register are read/write.
All port pins have individually selectable pull-up resistors. The Port B output buffers can sink 20mA and thus drive LED displays directly. When pins PB0 to PB7 are used as inputs and are externally pulled low, they will source current if the internal pull-up resistors are activated.
The Port B pins with alternate functions are shown in the following table:
When the pins are used for the alternate function the DDRB and PORTB register has to be set according to the alternate function description.
Port B Pins Alternate Functions
Port |
Pin |
Alternate Functions |
PORTB.0 |
T0 |
(Timer/Counter 0 external counter input) |
PORTB.1 |
T1 |
(Timer/Counter 1 external counter input) |
PORTB.2 |
AIN0 |
(Analog comparator positive input) |
PORTB.3 |
AIN1 |
(Analog comparator negative input) |
PORTB.4 |
SS |
(SPI Slave Select input) |
PORTB.5 |
MOSI |
(SPI Bus Master Output/Slave Input) |
PORTB.6 |
MISO |
(SPI Bus Master Input/Slave Output) |
PORTB.7 |
SCK |
(SPI Bus Serial Clock) |
The Port B Input Pins address - PINB - is not a register, and this address enables access to the physical value on each Port B pin. When reading PORTB, the PORTB Data Latch is read, and when reading PINB, the logical values present on the pins are read.
PortB As General Digital I/O
All 8 bits in port B are equal when used as digital I/O pins. PORTB.X, General I/O pin: The DDBn bit in the DDRB register selects the direction of this pin, if DDBn is set (one), PBn is configured as an output pin. If DDBn is cleared (zero), PBn is configured as an input pin. If PORTBn is set (one) when the pin configured as an input pin, the MOS pull up resistor is activated.
To switch the pull up resistor off, the PORTBn has to be cleared (zero) or the pin has to be configured as an output pin.
DDBn Effects on Port B Pins
DDBn |
PORTBn |
I/O |
Pull up |
Comment |
0 |
0 |
Input |
No |
Tri-state (Hi-Z) |
0 |
1 |
Input |
Yes |
PBn will source current if ext. pulled low. |
1 |
0 |
Output |
No |
Push-Pull Zero Output |
1 |
1 |
Output |
No |
Push-Pull One Output |
By default, the DDR and PORT registers are 0. CONFIG PORTx=OUTPUT will set the entire DDR register. CONFIG PINX.Y will also set the DDR register for a single bit/pin. When you need the pull up to be activated, you have to write to the PORT register.
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