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2013-02-13T12:17:30Z

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= The 16-Bit Timer/Counter1 =

 

[[File:Notice.jpg|notice]] The 90S8515 was used for the documentation. Other chips might have a somewhat different timer.

 

 

The 16-bit Timer/Counter1 can select its clock source from CK, pre-scaled CK, or an external pin. In addition it can be stopped (no clock).

 

The different status flags (overflow, compare match and capture event) and control signals are found in the Timer/Counter1 Control Registers - TCCR1A and TCCR1B.

 

 

The interrupt enable/disable settings for Timer/Counter1 are found in the Timer/Counter Interrupt Mask Register - TIMSK.

 

 

When Timer/Counter1 is externally clocked, the external signal is synchronized with the oscillator frequency of the CPU. To assure proper sampling of the external clock, the minimum time between two external clock transitions must be at least one internal CPU clock period.

 

The external clock signal is sampled on the rising edge of the internal CPU clock.

 

 

The 16-bit Timer/Counter1 features both a high resolution and a high accuracy usage with lower pre-scaling values.

 

Similarly, high pre-scaling values make the Timer/Counter1 useful for lower speed functions or exact timing functions with infrequent actions.

 

 

The Timer/Counter1 supports two Output Compare functions using the Output Compare Register 1 A and B -OCR1A and OCR1B as the data values to be compared to the Timer/Counter1 contents.

 

 

The Output Compare functions include optional clearing of the counter on compareA match, and can change the logic levels on the Output Compare pins on both compare matches.

 

 

Timer/Counter1 can also be used as a 8, 9 or 10-bit Pulse Width Modulator (PWM). In this mode the counter and the OCR1A/OCR1B registers serve as a dual glitch-free stand-alone PWM with centered pulses.

 

 

The Input Capture function of Timer/Counter1 provides a capture of the Timer/Counter1 value to the Input Capture Register - ICR1, triggered by an external event on the Input Capture Pin - ICP. The actual capture event settings are defined by the Timer/Counter1 Control Register -TCCR1B.

 

In addition, the Analog Comparator can be set to trigger the Capture.

 

 

 

 

[[File:Basc0075.jpg|center|basc0075]]

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AVR Internal Hardware TIMER1 - Revision history

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