ATMEGA406/de
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(Created page with "This page is intended to show the outline of the chip and to provide additional information that might not be clear from the data sheet. The image is from a preliminary data ...")
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(Created page with "This page is intended to show the outline of the chip and to provide additional information that might not be clear from the data sheet. The image is from a preliminary data ...")
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Revision as of 00:18, 15 February 2013
== (**COPIED FROM ENGLISH PAGE**) ==This page is intended to show the outline of the chip and to provide additional information that might not be clear from the data sheet.
The image is from a preliminary data sheet. It is not clear yet if SCL and SDA have pin names too.
This chip can only programmed parallel and with JTAG. Normal (serial) ISP programming is not available.
| Languages | English • Deutsch |
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